Method and device for data transmission between central processing unit (CPU) and co-processors

The invention provides a method and a device for data transmission between a central processing unit (CPU) and co-processors. The method comprises steps of controlling data transmission of N co-processors in accordance with N thread parallelisms generated by the CPU, and the N is an integer of no less than 2. The control comprises that co-processors receive data which are transmitted by the CPU in a slice mode. Or, the co-processors receive and store data slice of the current moment, which is transmitted by the CPU or the last co-processor and transmit the stored data slice of the last moment to the next co-processor. By the aid of the method and the device, buses among co-processors and the CPU and among co-processors can be utilized, and the transmission efficiency of data which are transmitted to co-processors by the CPU and transmitted to other co-processors by co-processors is improved.