Semiconductor memory device and associated access method

A semiconductor memory device (100) includes a cell array (110) is organized in a plurality of rows and columns, and a sense amplifier (150) is adapted to write and read operations for the cell array (110) in dependence of read and read commands to perform according to a first access time, the access time having a variable period, wherein the sense amplifier (150) adjusts pulse widths of the write-in and read-out data according to the period of the first access time.