Design aspects of MOS controlled thyristor elements

The authors have fabricated 2.5-kV thyristor devices with integrated MOS controlled n/sup +/ emitter shorts and a bipolar turn-on gate using a p-channel MOS technology. Square-cell geometries with pitch variations ranging from 15 to 30 mu m were implemented in one- and two-dimensional arrays with up to 20000 units. The impact of the cell pitch on the turn-off performance and the on-state voltage was studied for arrays with constant cathode area as well as for single-cell structures. By realizing MOS components with submicron channel lengths, scaled single cells are shown to turn off with current densities of several thousands of amperes per square centimeter at a gate bias of 5 V. Critical process parameters as well as the device behavior were optimized through multidimensional simulation studies.<<ETX>>

[1]  W. Fichtner.  Physics and simulation of small MOS devices , 1982, 1982 International Electron Devices Meeting.

[2]  A. Nakagawa.  Numerical experiment for 2500 V double gate bipolar-mode MOSFETs (DGIGBT) and analysis for large safe operating area (SOA) , 1988, PESC '88 Record., 19th Annual IEEE Power Electronics Specialists Conference.

[3]  U. Gosele,et al.  Variation of lateral doping—A new concept to avoid high voltage breakdown of planar junctions , 1985, 1985 International Electron Devices Meeting.

[4]  V.A.K. Temple,et al.  MOS-Controlled thyristors—A new class of power devices , 1986, IEEE Transactions on Electron Devices.