A Multiplier Based on the Algorithm of Chinese Abacus

Abstract — A 4x4 and 8x8 bit multiplier is demonstrated based on the Chinese abacus. As comparing the simulation result of this work with the speed of the 4x4 and 8x8 bits Braun array multiplier, the delays of the 8-bit abacus multiplier are 14% and 7.5% less than that of Braun array multiplier with 0.35µm and 0.18µm technologies, respectively. Meanwhile, the power consumption of the 8-bit abacus multiplier is, respectively, less about 11.9% and 22.3% also. Key WordBraun array multiplier, Chinese abacus multiplier, fast multiplier. — 1 Introduction Multiplication is one of the most critical operations in many computational systems. Among various multiplier techniques, array-based multipliers [1][2] and tree-based multipliers [3] are the most well known techniques and are often used in the VLSI design for implementing fast multipliers. This study presents a multiplier based on the antique Chinese abacus algorithm to achieve an efficient operation with high speed and low power consumption. The Chinese abacus is a very old and very popular invention, which has been used for centuries in China and other Asian countries to perform arithmetic functions. The basic architecture of the Chinese abacus is depicted in Fig.1, which demonstrates a decimal number of one hundred sixty-eight. Each column element has one higher bead with a weight of five and four lower beads, each with a weight of one. The key feature of the Chinese abacus is the use of one bead with weight five. This allows the user to minimize the transmission of rests. The first multiplier and adders employing the technique of the Chinese abacus are proposed by Gang et al. [4]–[6] Fig.1. Basic architecture of Chinese abacus coded with a decimal number of 168

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