Scalable Equivalent Circuit FET Model for MMIC Design Identified Through FW-EM Analyses

A scalable approach to the modeling of millimeter- wave field-effect transistors is presented in this paper. This is based on the definition of a lumped extrinsic parasitic network, easily scalable with both the number of fingers and the finger widths. The identification of the extrinsic network parameters is carried out by means of accurate full-wave electromagnetic simulations based on the layout of a single reference device. In the paper, the parasitic effects of the gate/drain manifolds and of the source layout are investigated, leading to the definition of realistic linear scaling rules. The obtained model is experimentally validated by using a family of 0.25-mum millimeter-wave GaAs pseudomorphic HEMTs through the accurate prediction of critical performance indicators, such as the linear maximum power gain or the stability factor. Despite the simplicity of the proposed model, it proves to be as accurate as typical scalable models provided by foundries. Straightforward application of the scalable modeling approach to the optimum device geometry selection in a typical design problem is also presented.

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