Learning Heuristics for OBDD Minimization by Evolutionary Algorithms
暂无分享,去创建一个
[1] 藤田 昌宏,et al. Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams , 1988 .
[2] R. Rudell. Dynamic variable ordering for ordered binary decision diagrams , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).
[3] Kurt Keutzer,et al. Gate-delay-fault testability properties of multiplexor-based networks , 1993, Formal Methods Syst. Des..
[4] Randal E. Bryant,et al. Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.
[5] Nagisa Ishiura,et al. Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.
[6] R. Drechsler,et al. Learning heuristics by genetic algorithms , 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.
[7] Hiroshige Fujii,et al. Interleaving based variable ordering methods for ordered binary decision diagrams , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).
[8] David E. Goldberg,et al. Genetic Algorithms in Search Optimization and Machine Learning , 1988 .
[9] H. Esbensen. A macro-cell global router based on two genetic algorithms , 1994, EURO-DAC '94.
[10] Kurt Keutzer,et al. Gate-delay-fault testability properties of multiplexor-based networks , 1991, 1991, Proceedings. International Test Conference.
[11] Luciano Lavagno,et al. Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool , 1995, 32nd Design Automation Conference.
[12] Robert K. Brayton,et al. Logic synthesis for programmable gate arrays , 1991, DAC '90.
[13] Rolf Drechsler,et al. A Genetic Algorithm for Minimization of Fixed Polarity Reed-Muller Expressions , 1995, ICANNGA.
[14] Rolf Drechsler,et al. Minimization of OKFDDs by Genetic Algorithms , 1996 .
[15] F. Somenzi,et al. Who are the variables in your neighbourhood , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).
[16] Nostrand Reinhold,et al. the utility of using the genetic algorithm approach on the problem of Davis, L. (1991), Handbook of Genetic Algorithms. Van Nostrand Reinhold, New York. , 1991 .
[17] Rolf Drechsler,et al. A genetic algorithm for variable ordering of obdds , 1996 .
[18] Masahiro Fujita,et al. Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[19] D. E. Goldberg,et al. Genetic Algorithms in Search, Optimization & Machine Learning , 1989 .
[20] Kenneth J. Supowit,et al. Finding the Optimal Variable Ordering for Binary Decision Diagrams , 1987, 24th ACM/IEEE Design Automation Conference.
[21] Masahiro Fujita,et al. On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..
[22] Rolf Drechsler,et al. Learning heuristics for OKFDD minimization by evolutionary algorithms , 1996, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.
[23] Albert R. Wang,et al. Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[24] Don E. Ross,et al. Functional approaches to generating orderings for efficient symbolic representations , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[25] Thomas Bäck,et al. An Overview of Evolutionary Algorithms for Parameter Optimization , 1993, Evolutionary Computation.
[26] Hiroshi Sawada,et al. Minimization of binary decision diagrams based on exchanges of variables , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[27] Jens Lienig,et al. A Genetic Algorithm for Channel Routing in VLSI Circuits , 1993, Evolutionary Computation.
[28] Fabio Somenzi,et al. Who are the variables in your neighborhood , 1995, ICCAD.
[29] Kurt Keutzer,et al. Path-delay-fault testability properties of multiplexor-based networks , 1993, Integr..
[30] SchwefelHans-Paul,et al. An overview of evolutionary algorithms for parameter optimization , 1993 .
[31] I. Wegener,et al. SIMULATED ANNEALING TO IMPROVE VARIABLE ORDERINGS FOR OBDDsBeate , 1995 .
[32] Masahiro Fujita,et al. Variable ordering algorithms for ordered binary decision diagrams and their evaluation , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[33] Rolf Drechsler,et al. Dynamic minimization of OKFDDs , 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.
[34] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[35] Lawrence. Davis,et al. Handbook Of Genetic Algorithms , 1990 .
[36] Bernd Becker,et al. Fast OFDD based minimization of fixed polarity Reed-Muller expressions , 1994, EURO-DAC '94.
[37] Andreas Kuehlmann,et al. Grammar-based optimization of synthesis scenarios , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.