Dry etch process optimization for small-area a-Si:H vertical thin film transistor

This article reports the investigation of dry etch processes suitable for small-area amorphous silicon (a-Si:H) vertical thin film transistor (VTFT) fabrication. SF6/O2 and CF4/H2 gas mixtures were experimented on for the anisotropic etching of an n+a-Si:H/a-SiNx:H/n+a-Si:H trilayer to give a self-aligned vertical drain–source stacked structure that is desirable for subsequent deposition of the VTFT channel layers. The results show that the trilayer profiles formed with the SF6/O2 plasma for different O2 concentrations suffered different degrees of undercutting of the composite layers under overetching condition, leading to misaligned etch profiles. On the other hand, the CF4/20%H2 plasma provides a self-aligned vertical trilayer profile even after 1 min of overetching.

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