Automatic design of approximate circuits by means of multi-objective evolutionary algorithms
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[1] Lukás Sekanina,et al. Circuit Approximation Using Single- and Multi-objective Cartesian GP , 2015, EuroGP.
[2] Zdenek Vasícek. Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates , 2015, EuroGP.
[3] Kurt Keutzer,et al. Estimation of average switching activity in combinational logic circuits using symbolic simulation , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[4] Kaushik Roy,et al. ASLAN: Synthesis of approximate sequential circuits , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[5] Lukás Sekanina,et al. Towards highly optimized cartesian genetic programming: from sequential via SIMD and thread to massive parallel implementation , 2014, GECCO.
[6] Martin C. Rinard,et al. Verifying quantitative reliability for programs that execute on unreliable hardware , 2013, OOPSLA.
[7] David Harris,et al. CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .
[8] Lukás Sekanina,et al. This is an author-created accepted version of the paper: Vasicek Z., Sekanina L.: Formal Verification of Candidate Solutions for Post- Synthesis Evolutionary Optimization in Evolvable Hardware. Genetic Programming and Evolvable Machines, Spec. Issue on Evolvable Hardware , 2011 .
[9] Kalyanmoy Deb,et al. A fast and elitist multiobjective genetic algorithm: NSGA-II , 2002, IEEE Trans. Evol. Comput..
[10] Shih-Lien Lu. Speeding Up Processing with Approximation Circuits , 2004, Computer.
[11] Lukás Sekanina,et al. Evolutionary design of approximate multipliers under different error metrics , 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.
[12] Kaushik Roy,et al. Substitute-and-simplify: A unified design paradigm for approximate and quality configurable circuits , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[13] Kaushik Roy,et al. SALSA: Systematic logic synthesis of approximate circuits , 2012, DAC Design Automation Conference 2012.
[14] Radek Hrbacek,et al. Parallel Multi-Objective Evolutionary Design of Approximate Circuits , 2015, GECCO.
[15] Lukás Sekanina,et al. Evolutionary Approach to Approximate Digital Circuits Design , 2015, IEEE Transactions on Evolutionary Computation.
[16] Renato P. Ribas,et al. Power consumption analysis in static CMOS gates , 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).
[17] Julian Francis Miller,et al. Redundancy and computational efficiency in Cartesian genetic programming , 2006, IEEE Transactions on Evolutionary Computation.
[18] Kaushik Roy,et al. Low-Power Digital Signal Processing Using Approximate Adders , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[19] Sherief Reda,et al. ABACUS: A technique for automated behavioral synthesis of approximate computing circuits , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[20] Lukás Sekanina,et al. How to evolve complex combinational circuits from scratch? , 2014, 2014 IEEE International Conference on Evolvable Systems.