mm-Wave Broadband Downconverters
暂无分享,去创建一个
[1] Behzad Razavi,et al. RF Microelectronics (2nd Edition) (Prentice Hall Communications Engineering and Emerging Technologies Series) , 2011 .
[2] Kenichi Okada,et al. Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry , 2013, IEEE Journal of Solid-State Circuits.
[3] Matteo Bassi,et al. A 15 GHz-bandwidth 20dBm PSAT power amplifier with 22% PAE in 65nm CMOS , 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).
[4] Hooman Darabi,et al. 21.8 A pulling mitigation technique for direct-conversion transmitters , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).
[5] Sherif Shakib,et al. A Highly Efficient and Linear Power Amplifier for 28-GHz 5G Phased Array Radios in 28-nm CMOS , 2016, IEEE Journal of Solid-State Circuits.
[6] Davide Guermandi,et al. A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS , 2011, IEEE Journal of Solid-State Circuits.
[7] Davide Guermandi,et al. A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C , 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).
[8] John R. Long,et al. A 58–65 GHz Neutralized CMOS Power Amplifier With PAE Above 10% at 1-V Supply , 2010, IEEE Journal of Solid-State Circuits.
[9] H.T. Friis,et al. Noise Figures of Radio Receivers , 1944, Proceedings of the IRE.
[10] Alyosha C. Molnar,et al. A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface , 2010, IEEE Journal of Solid-State Circuits.
[11] Patrick Reynaert,et al. A 40-nm CMOS E-Band 4-Way Power Amplifier With Neutralized Bootstrapped Cascode Amplifier and Optimum Passive Circuits , 2015, IEEE Transactions on Microwave Theory and Techniques.
[12] Marco Vigilante,et al. A 25–102GHz 2.81–5.64mW tunable divide-by-4 in 28nm CMOS , 2015, 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC).
[13] A. Tomkins,et al. Nanoscale CMOS Transceiver Design in the 90–170-GHz Range , 2009, IEEE Transactions on Microwave Theory and Techniques.
[14] Ahmad Mirzaei,et al. Highly Integrated and Tunable RF Front Ends for Reconfigurable Multiband Transceivers: A Tutorial , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.
[15] Meng Ling-qin. A Wide-band and Low-noise RFIC Amplifier Design , 2005 .
[16] Ahmad Mirzaei,et al. A Low-Power Process-Scalable Super-Heterodyne Receiver With Integrated High-$Q$ Filters , 2011, IEEE Journal of Solid-State Circuits.
[17] Noriaki Kaneda,et al. A 70–100 GHz Direct-Conversion Transmitter and Receiver Phased Array Chipset Demonstrating 10 Gb/s Wireless Link , 2013, IEEE Journal of Solid-State Circuits.
[18] Mourad N. El-Gamal,et al. A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[19] Rinaldo Castello,et al. SAW-less analog front-end receivers for TDD and FDD , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[20] D.K. Ma,et al. A 17.1-17.3-GHz image-reject downconverter with phase-tunable LO using 3/spl times/ subharmonic injection locking , 2004, IEEE Journal of Solid-State Circuits.
[21] André Bourdoux,et al. 19.7 A 79GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[22] Patrick Reynaert,et al. A 40 nm CMOS E-Band Transmitter With Compact and Symmetrical Layout Floor-Plans , 2015, IEEE Journal of Solid-State Circuits.
[23] Patrick Reynaert,et al. An E-Band Power Amplifier With Broadband Parallel-Series Power Combiner in 40-nm CMOS , 2015, IEEE Transactions on Microwave Theory and Techniques.
[24] Masaru Sato,et al. A millimeter-wave CMOS low noise amplifier using transformer neutralization techniques , 2011, Asia-Pacific Microwave Conference 2011.
[25] D. Manstretta,et al. A broadband millimeter-wave passive CMOS down-converter , 2012, 2012 IEEE Radio Frequency Integrated Circuits Symposium.
[26] B. Jagannathan,et al. A 17.1 to 17.3 GHz image-reject down-converter with phase-tunable LO using 3/spl times/ subharmonic injection locking , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[27] D.J. Allstot,et al. G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS , 2005, IEEE Journal of Solid-State Circuits.
[28] Willy M. C. Sansen,et al. 1.3 Analog CMOS from 5 micrometer to 5 nanometer , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[29] Nadav Mazor,et al. High-Performance E-Band Transceiver Chipset for Point-to-Point Communication in SiGe BiCMOS Technology , 2016, IEEE Transactions on Microwave Theory and Techniques.
[30] Seizo Onoe. 1.3 Evolution of 5G mobile technology toward 1 2020 and beyond , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).
[31] Sandipan Kundu,et al. A Compact, Supply-Voltage Scalable 45–66 GHz Baseband-Combining CMOS Phased-Array Receiver , 2015, IEEE Journal of Solid-State Circuits.
[32] Jonathan Wells,et al. Multi-Gigabit Microwave and Millimeter-Wave Wireless Communications , 2010 .
[33] P. Garcia,et al. A Wideband W-Band Receiver Front-End in 65-nm CMOS , 2008, IEEE Journal of Solid-State Circuits.
[34] B. Razavi. A study of injection locking and pulling in oscillators , 2004, IEEE Journal of Solid-State Circuits.
[35] Jri Lee,et al. A fully integrated 77GHz FMCW radar system in 65nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[36] Jacques C. Rudell,et al. An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers , 2016, IEEE Journal of Solid-State Circuits.
[37] Yuan Du,et al. A Blocker-Tolerant Current Mode 60-GHz Receiver With 7.5-GHz Bandwidth and 3.8-dB Minimum NF in 65-nm CMOS , 2015, IEEE Transactions on Microwave Theory and Techniques.
[38] Marco Vigilante,et al. On the Design of Wideband Transformer-Based Fourth Order Matching Networks for ${E}$ -Band Receivers in 28-nm CMOS , 2017, IEEE Journal of Solid-State Circuits.
[39] P. Wambacq,et al. Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS , 2008, IEEE Journal of Solid-State Circuits.
[40] Willy Sansen,et al. analog design essentials , 2011 .
[41] Hua Wang,et al. A CMOS Broadband Power Amplifier With a Transformer-Based High-Order Output Matching Network , 2010, IEEE Journal of Solid-State Circuits.
[42] Zhihua Wang,et al. 25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filter , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[43] Andrea Bevilacqua,et al. A 40–67 GHz Power Amplifier With 13 dBm ${\rm P}_{\rm SAT}$ and 16% PAE in 28 nm CMOS LP , 2015, IEEE Journal of Solid-State Circuits.
[44] Patrick Reynaert,et al. A 60-GHz Dual-Mode Class AB Power Amplifier in 40-nm CMOS , 2013, IEEE Journal of Solid-State Circuits.
[45] Behzad Razavi,et al. Design considerations for direct-conversion receivers , 1997 .
[46] David J. Allstot,et al. A capacitor cross-coupled common-gate low-noise amplifier , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.
[47] Antonio Liscidini. Fundamentals of Modern RF Wireless Receivers: A Short Tutorial , 2015, IEEE Solid-State Circuits Magazine.