The residue logarithmic number system: theory and implementation

The residue logarithmic number system (RLNS) represents real values as quantized logarithms which, in turn, are represented using the residue number system (RNS). Compared to the conventional logarithmic number system (LNS) in which quantized logarithms are represented as binary integers, RLNS offers faster multiplication and division times. RLNS and LNS use a table lookup involving all bits for addition. The width, dynamic range, precision and naive table size of RLNS (with careful moduli selection) is as good as those for conventional LNS. Conventional LNS can be more efficient than naive addition lookup. First, commutativity allows interchanging arguments. Second, the addition function is often essentially zero, and does not have to be tabulated. In binary, comparisons are easy. In residue, comparisons are slow. Although RLNS inherently demands comparison, this paper shows a novel way comparisons can be performed in parallel to the lookup from a small table. This paper also describes a novel tool that generates synthesizable Verilog, making RLNS viable in practical applications that can benefit from shorter multiply and divide times.

[1]  Paolo Montuschi,et al.  Proceedings 17th IEEE Symposium on Computer Arithmetic , 2005 .

[2]  Marco Re,et al.  A tool for automatic generation of RTL-level VHDL description of RNS FIR filters , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[3]  R. A. Falk,et al.  Optical arithmetic/logic unit based on residue arithmetic and symbolic substitution. , 1988, Applied optics.

[4]  Neil Burgess,et al.  A Dual-Path Logarithmic Number System Addition/Subtraction Scheme for FPGA , 2003, FPL.

[5]  Kensuke Shimizu,et al.  Residue arithmetic circuits based on the signed-digit multiple-valued arithmetic circuits , 1998, Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138).

[6]  Vassilis Paliouras,et al.  Low-power properties of the logarithmic number system , 2001, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001.

[7]  Earl E. Swartzlander,et al.  The Sign/Logarithm Number System , 1975, IEEE Transactions on Computers.

[8]  Eisuke Kinoshita,et al.  A Residue Arithmetic Extension for Reliable Scientific Computation , 1997, IEEE Trans. Computers.

[9]  Israel Koren Computer arithmetic algorithms , 1993 .

[10]  Jie Ruan,et al.  Bipartite implementation of the residue logarithmic number system , 2005, SPIE Optics + Photonics.

[11]  Vassilis Paliouras,et al.  Multifunction architectures for RNS processors , 1999 .

[12]  Michael J. Schulte,et al.  The interval logarithmic number system , 2003, Proceedings 2003 16th IEEE Symposium on Computer Arithmetic.

[13]  M.J. Feldman,et al.  Single flux quantum circuits using the residue number system , 1995, IEEE Transactions on Applied Superconductivity.

[14]  David M. Lewis Interleaved Memory Function Interpolators with Application to an Accurate LNS Arithmetic Unit , 1994, IEEE Trans. Computers.

[15]  Thomas Conway,et al.  New one-hot RNS structures for high-speed signal processing , 2002, SPIE Optics + Photonics.

[16]  Mark G. Arnold Reduced power consumption for MPEG decoding with LNS , 2002, Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors.

[17]  J. Detrey,et al.  A VHDL library of LNS operators , 2003, The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003.

[18]  Neil Burgess Scaling an RNS number using the core function , 2003, Proceedings 2003 16th IEEE Symposium on Computer Arithmetic.

[19]  Dimitrios Soudris,et al.  A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[20]  Fred J. Taylor,et al.  A 20 Bit Logarithmic Number System Processor , 1988, IEEE Trans. Computers.

[21]  F. J. Taylor,et al.  A reduced-complexity finite field ALU , 1991 .

[22]  Jr. W.A. Chren,et al.  One-hot residue coding for low delay-power product CMOS design , 1998 .