Optimal input load disturbance rejection controller design for typical integrating processes based on IMC structure

In this paper, an H2 optimal input load disturbance rejection (ILDR) controller for three typical integrating processes with dead time is proposed based on the Internal Model Control (IMC) structure. Different from other load disturbance rejection methods, the proposed design method is to minimizing the ILDR criterion for integrating processes with dead time. Compared with previous advanced control methods, the proposed design method has three main advantages. First, the proposed design method can optimally suppress the input load disturbance. Second, the design procedure is simple. No weight functions need to be chosen in the design method. The designed controller is given in an analytical form. Third, the robustness stability can be achieved by monotonously tuning the parameters given in the designed controller. Numerical simulations are given to illustrate the effectiveness of the proposed method.

[1]  D. Seborg,et al.  PI/PID controller design based on direct synthesis and disturbance rejection , 2002 .

[2]  Sunwon Park,et al.  PID controller tuning for desired closed‐loop responses for SI/SO systems , 1998 .

[3]  Ramon Vilanova,et al.  IMC-like analytical H∞ design with S/SP mixed sensitivity consideration: Utility in PID tuning guidance , 2011 .

[4]  Eduardo F. Camacho,et al.  Unified approach for robust dead-time compensator design , 2009 .

[5]  Thomas F. Edgar,et al.  ISE tuning rule revisited , 2004, Autom..

[6]  Sigurd Skogestad,et al.  Tuning for Smooth PID Control with Acceptable Disturbance Rejection , 2006 .

[7]  Irving Lefkowitz,et al.  Internal model-based control for integrating processes. , 2010, ISA transactions.

[8]  Somanath Majhi,et al.  PID controller tuning for integrating processes. , 2010, ISA transactions.

[9]  Ramon Vilanova,et al.  Robust Tuning and Performance Analysis of 2DoF PI Controllers for Integrating Controlled Processes , 2012 .

[10]  Sigurd Skogestad,et al.  Simple analytic rules for model reduction and PID controller tuning , 2003 .

[11]  Tao Liu,et al.  Enhanced IMC design of load disturbance rejection for integrating and unstable processes with slow dynamics. , 2011, ISA transactions.

[12]  Chang Chieh Hang,et al.  Single-loop controller design via IMC principles , 2001, Autom..

[13]  Qibing Jin,et al.  Analytical IMC-PID design in terms of performance/robustness tradeoff for integrating processes: From 2-Dof to 1-Dof , 2014 .

[14]  Tao Liu,et al.  Analytical design of two-degree-of-freedom control scheme for open-loop unstable processes with time delay , 2005 .

[16]  Moonyong Lee,et al.  Design of advanced PID controller for enhanced disturbance rejection of second-order processes with time delay , 2008 .

[17]  Jose Alvarez-Ramirez,et al.  Optimality of internal model control tuning rules , 2004 .

[18]  A. Seshagiri Rao,et al.  ENHANCED IMC-PID CONTROLLER DESIGN WITH LEAD-LAG FILTER FOR UNSTABLE AND INTEGRATING PROCESSES WITH TIME DELAY , 2014 .

[19]  Moonyong Lee,et al.  Enhanced disturbance rejection for open-loop unstable process with time delay. , 2009, ISA transactions.

[20]  Weidong Zhang,et al.  Quantitative Process Control Theory , 2011 .

[21]  Youxian Sun,et al.  Two Degree-of-Freedom Smith Predictor for Processes with Time Delay , 1998, Autom..