Algorithms and parallel VLSI architectures III : proceedings of the International Workshop, Algorithms and Parallel VLSI Architectures III, Leuven, Belgium, August 29-31, 1994

Part 1 Parallel algorithms: subspace methods in system identification and source localization, P.A. Regalia pipelining the inverse updates RLS array by algorithmic engineering, J. McWhirter and I.K. Proudler hierarchical signal flow graph representation of the square-root covariance Kalman filter, D.W. Brown and F.M.F. Gaston a systolic algorithm for block-regularized RLS identification, J. Schier numerical analysis of a normalised RLS filter using a probability description of propagated data, J. Kadlec adaptive approximate rotations for computing the symmetric EVD, J. Gotze and G.J. Hekstra parallel implementation of the double bracket matrix flow for eigenvalue-eigenvector computation and sorting, N. Saxena and J.J. Clark parallel block iterative solvers for heterogeneous computing environments, M. Arioli et al efficient VLSI architecture for residue to binary converter, G.C. Cardarilli et al. Part 2 Parallel architectures: a case study in algorithm-architecture codesign - hardware-accelerator for long integer arithmetic, C. Riem et al an optimisation methodology for mapping a diffusion algorithm for vision into a modular and flexible array architecture, J. Rosseel et al a scalable design for dictionary machines, T. Duboux et al systolic implementation of Smith and Waterman algorithm on a SIMD coprocessor, D. Archambaud et al architecture and programming of parallel video signal processors, K. Vissers et al a highly parallel single-chip video signal processor, K. Ronner et al a memory efficient, programmable multi-processor architecture for real-time motion estimation type algorithms, E. De Greef et al instruction-level parallelism in asynchronous processor architectures, D.K. Arvind and V.E.F. Rebello high speed wood inspection using a parallel VLSI architecture, M. Hall and A. Astrom CONVEX exemplar systems - scalable parallel processing, J. van Kats modelling the 2-D FCT on a multiprocessor system, C.A. Christopoulos et al parallel grep, J. Champeau et al. Part 3 Parallel compilation: compiling for massively parallel architectures - a perspective, P. Feautrier DIV, FLOOR, CEIL, MOD and STEP functions in nested loop programs and linear bounded lattices, P. Held and B. Kienhuis uniformisation techniques for reducible integral recurrence equations, L. Rapanotti and G.M. Megson HOPP - a higher-order parallel programming model, R. Rangaswami design by transformation of synchronous descriptions, G. Durrieu and M. Lemaitre heuristics for evaluation of array expressions on state of the art massively parallel machines, V. Bouchitte et al on factors limiting the generation of efficient compiler-parallelized programs, M.R. Werth and P. Feautrier from dependence analysis to communication code generation - the "look forwards" model, C. Reffay and G.-R. Perrin. (Part contents).