Flipflop circuit and scan flipflop circuit

The scan flip-flop circuit comprising: a pulse generator, the dynamic input and output latches. Pulse generator generates a pulse signal to be selectively activated according to the mode. Dynamic input section to the first node in the first phase of the clock signal occupies free to power supply voltage level, in the normal mode of the second phase of the clock signal based on the evaluation of the input data and determine the discharge if the first node, the scan mode in response to the pulse signal to discharge the first node. And latches the output unit determined by the previous state of the logic level and the output data of at least the clock signal to toggle whether the output data, but also available in the output data latch internal signal provided by the first node.