Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters

We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1-<formula formulatype="inline"><tex Notation="TeX">$\mu\hbox{m}$</tex></formula> pitch) FEAs that are individually ballasted by 100-nm-diameter and 10-<formula formulatype="inline"><tex Notation="TeX">$\mu\hbox{m}$</tex></formula>-tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current–voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 <formula formulatype="inline"><tex Notation="TeX">$\mu\hbox{A/cm}^{2}$</tex></formula> were obtained from 1.36 million emitter arrays with 5-<formula formulatype="inline"><tex Notation="TeX">$\mu\hbox{m}$</tex></formula> pitch.

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