Floating Gate-Based Field Programmable Mixed-Signal Array
暂无分享,去创建一个
[1] Christopher M. Twigg,et al. A Large-Scale Reconfigurable Analog Signal Processor (RASP) IC , 2006, IEEE Custom Integrated Circuits Conference 2006.
[2] Kenneth B. Kent,et al. Odin II: an open-source verilog HDL synthesis tool for FPGA cad flows (abstract only) , 2010, FPGA '10.
[3] B. A. Minch,et al. Translinear circuits using subthreshold floating-gate MOS transistors , 1996 .
[4] David V. Anderson,et al. Large-scale field-programmable analog arrays for analog signal processing , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.
[5] Christopher M. Twigg,et al. A Floating-Gate-Based Field-Programmable Analog Array , 2010, IEEE Journal of Solid-State Circuits.
[6] E.K.F. Lee,et al. A transconductor-based field-programmable analog array , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.
[7] Christopher M. Twigg,et al. Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[8] J.M. Moreno,et al. Rapid prototyping of electronic systems using FIPSOC , 1999, 1999 7th IEEE International Conference on Emerging Technologies and Factory Automation. Proceedings ETFA '99 (Cat. No.99TH8467).
[9] P. Glenn Gulak,et al. A Field-Programmable Mixed-Analog-Digital Array , 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.
[10] Xi Qin,et al. A reconfigurable analog processor using coarse-grained, heterogeneous configurable analog blocks for field programmable mixed-signal processing , 2011 .
[11] Marek Wojcikowski,et al. A field programmable analog array for CMOS continuous-time OTA-C filter applications , 2002 .
[12] David M. Lewis,et al. MAX II: A low-cost, high-performance LUT-based CPLD , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).
[13] Jordi Madrenas,et al. A Translinear, Log-Domain FPAA on Standard CMOS Technology , 2012, IEEE Journal of Solid-State Circuits.
[14] Ranga Vemuri,et al. Behavioral partitioning in the synthesis of mixed analog-digital systems , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[15] David V. Anderson,et al. Placement for large-scale floating-gate field-programable analog arrays , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[16] A. El Gamal,et al. Architecture of field-programmable gate arrays , 1993, Proc. IEEE.
[17] Vaughn Betz,et al. Architecture and CAD for Deep-Submicron FPGAS , 1999, The Springer International Series in Engineering and Computer Science.
[18] Jason Luu,et al. VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling , 2009, FPGA '09.
[19] C. Hu. Interconnect devices for field programmable gate array , 1992, 1992 International Technical Digest on Electron Devices Meeting.
[20] M. Ortmanns,et al. A Field-Programmable Analog Array of 55 Digitally Tunable OTAs in a Hexagonal Lattice , 2008, IEEE Journal of Solid-State Circuits.
[21] Csaba Petre,et al. Vector matrix multiplier on field programmable analog array , 2010, 2010 IEEE International Conference on Acoustics, Speech and Signal Processing.
[22] P. Glenn Gulak,et al. TP 11.7: A Transconductor-Based Field-Programmable Analog Array* , 1995 .
[23] M. Mar,et al. An architecture for a configurable mixed-signal device , 2003 .