论文信息 - Formal semantics for a symbolic IC design technique: Examples and applications

Formal semantics for a symbolic IC design technique: Examples and applications

Abstract A formal modeling scheme for studying the behavior of circuits designed using a symbolic integrated circuit design technique is developed. The formalism is of value when attempting to synthesize such circuits proceeding from higher level specifications, for verifying the correctness of such designs, and in the development of probably correct optimization strategies for these circuits.

Sanjay V. Rajopadhye | P. A. Subrahmanyam | S. Rajopadhye | P. Subrahmanyam

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