Multiple scattering among vias in planar waveguides using preconditioned SMCG method
暂无分享,去创建一个
Leung Tsang | Chi Hou Chan | Kung-Hau Ding | Chung-Chi Huang | L. Tsang | C. Chan | K. Ding | Chung-Chi Huang
[1] J. Kong,et al. Scattering of Electromagnetic Waves, Numerical Simulations , 2001 .
[2] Jong-Gwan Yook,et al. Characterization of high frequency interconnects using finite difference time domain and finite element methods , 1994 .
[3] J. P. Quine,et al. Characterization of via connections in silicon circuit boards , 1988 .
[4] Albert E. Ruehli,et al. Solution of a complex via-pin connector problem using the partial element equivalent circuit (PEEC) method , 1999, 1999 IEEE International Symposium on Electromagnetic Compatability. Symposium Record (Cat. No.99CH36261).
[5] R. Harrington,et al. Quasi-static analysis of a microstrip via through a hole in a ground plane , 1988 .
[6] L. Tsang,et al. Modeling of multiple scattering among vias in planar waveguides using Foldy–Lax equations , 2001 .
[7] F. Olyslager,et al. Study of the ground bounce caused by power plane resonances , 1998 .
[8] Andrew F. Peterson,et al. Rigorous and simplified models for the capacitance of a circularly symmetric via , 1997 .
[9] Qin Li,et al. Quasi‐static parameters, low‐frequency solutions, and full‐wave solutions of a single‐layered via , 2002 .
[10] Chang-Yu Wu,et al. The restriction on delta-I noise along the power/ground layer in the highspeed digital printed circuit board , 1998, 1998 IEEE EMC Symposium. International Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.98CH36253).
[11] Leung Tsang,et al. Multiple scattering among vias in lossy planar waveguides using SMCG method , 2002 .
[12] Ruey-Beei Wu,et al. Full-wave characterization of a through hole via in multi-layered packaging , 1995 .
[13] Qin Li,et al. Analysis of a large number of vias and differential signaling in multilayered structures , 2003 .
[14] Tapan K. Sarkar,et al. Computation of Inductance of Simple Vias Between Two Striplines Above a Ground Plane (Short Papers) , 1985 .
[15] Leung Tsang,et al. A sparse‐matrix canonical‐grid method for scattering by many scatterers , 1995 .
[16] Daniël De Zutter,et al. Capacitance of a circular symmetric model of a via hole including finite ground plane thickness , 1991 .
[17] Jin Au Kong,et al. Coupled noise analysis for adjacent vias in multilayered digital circuits , 1994 .
[18] Raj Mittra,et al. Computation of the equivalent capacitance of a via in a multilayered board using the closed-form Green's function , 1996 .
[19] Jiayuan Fang,et al. Shorting via arrays for the elimination of package resonance to reduce power supply noise in multi-layered area-array IC packages , 1998, Proceedings. 1998 IEEE Symposium on IC/Package Design Integration (Cat. No.98CB36211).
[20] L. Tsang,et al. A sparse-matrix/canonical grid method for analyzing densely packed interconnects , 2000 .
[21] Daniël De Zutter,et al. Modelling complex via hole structures , 2001 .
[22] Raj Mittra,et al. Time-domain electromagnetic analysis of interconnects in a computer chip package , 1992 .