PSR Flyback Converter를 위한 전압 레귤레이터 설계

In this paper, we presents a voltage regulator for Primary-Side Regulation Flyback Converter. The voltage regulator has been designed in a 1 ㎛ high voltage (20V) CMOS process. The simulation results of proposed circuit show line regulation 0.18 %V, load regulation 0.04 % in condition of output current 200 ㎃.