CATBR-Congestion Aware Traffic Bridging Routing among hierarchical networks-on-chip

In order to ease the communication cost, application tasks are always distributed to nearby nodes in NoC-enabled SoCs, which result in concentrated area of traffic and power distribution. To utilize the intellectual properties on a single chip, and at the meantime, to reduce the high latency due to the long routing hops in large scale on-chip networks, hierarchy has been adopted to provide more attractive solutions to eliminate the performance degradation. Therefore, application tasks are more freely assigned to distant nodes with less communication cost. However, high competition of hierarchical channels along with the hierarchical levels, brings about traffic distribution challenge among the hierarchy, which greatly impacts the network saturation and overall performance. In this paper, we propose an expandable routing Congestion Aware Traffic Bridging Routing(CATBR) strategy to alleviate the potential severe congestion in hierarchical NoCs. By dividing the network into virtual regions, the region header node (bridge node) makes the decision of whether to route a packet to higher levels or not. The simulation results proved that the congestion is easy to form in the bridging up-links, while the bridging down-links has less effect on the network performance. Through the traffic bridging routing on up-links, the network achieves better link utilization and the network throughput is guaranteed.

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