Short-Circuit Instabilities in Silicon IGBTs and Silicon Carbide Power MOSFETs

Power semiconductor devices are exposed to different type of stresses over their lifetime, which they need to overcome in order to guarantee long-term reliable operation up to 20 years or more. One of the most typical stresses that the device must withstand is related to short-circuit events, which occur randomly during the component’s life. Silicon-based IGBTs are good candidates for limiting the external current in case of a short-circuit event, however their robustness is frequently limited due to instabilities. In this Ph.D. thesis, the short-circuit performance of silicon-based IGBTs has been extensively evaluated, but since Wide-Band Gap (WBG) devices, such as SiC MOSFETs, are rapidly growing as a potential substitute of silicon-based technologies, its robustness with respect to short circuit is also addressed. One of the most important experimental findings, and also the main motivation of this thesis, is that IGBTs exposed under specific operational conditions suffer from high frequency gate voltage oscillations (i.e., tens of MHz). Such oscillations are very critical in case that they become unstable, which will cause the catastrophic damage of the device. This failure type cannot be explained by any known short-circuit failure mechanism reported in the literature. Therefore, the aim was to investigate which factors could lead the IGBT into an unstable behaviour. This was achieved by using a combination of finite-element device simulations and experimental investigations of 1.2 kV, 1.7 kV, 3.3 kV, IGBTs with different cell technologies (i.e., planar, trench and BIGT). The experimental results demonstrate that the short-circuit ruggedness strongly depends on the applied DC-link voltage, this means that at low DC-link voltages the oscillations always occur, but at high DC-link voltages oscillations may not observed. A sensitivity analysis on the oscillating behavior’s dependence revealed that there are some factors which help to minimize the oscillations: low gate-emitter voltage, high temperature and reduced stray inductance. The root cause of the oscillation mechanism has been discovered to be as a consequence of a parametric oscillation, whose time-varying element is the Miller capacitance, leading to an amplification mechanism involving the external circuit. As a major achievement of this work, it has been possible to correlate the electric field distortions to