Notes on the Implementation of MUSBOX: A Compiler for the Systems Concepts Digital Synthesizer

In 1978 the Center for Computer Research in Music and Acoustics (CCRMA) at Stanford University acquired a remarkable musical instrument: the prototype of the Systems Concepts Digital Synthesizer (SCS) designed and built by Peter Samson of Systems Concepts, San Francisco, to the specifications of CCRMA. The principal purpose of the synthesizer design was to address the high computational bandwidth required for real-time high-quality digital audio signal processing. It is well known that digital synthesis techniques have been limited by the sheer speed, precision, and consequent volume of computation required for useful and interesting results. It was hoped that a special-purpose digital computer that directly addressed the nature of the data to be manipulated would be sufficiently fast to do useful amounts of signal computation in real time. The resulting design is described elsewhere in the literature (Loy 1980; Samson 1980; Samson forthcoming), but a brief review is not out of place here. The synthesizer uses standard TTL logic, relying extensively on time-division multiplexing and pipelining techniques to implement a fixed set of processing capabilities. The synthesizer is divided into modules, called processing elements, which can be configured to perform specific signal processing functions. There are four classes of processing elements, each class being uniquely suited to one kind of processing (Fig. 1). They are generators, which produce a variety of periodic fixedwaveform signals; modifiers, which modify signals; sum memory, which provides a means of intercommunication between the individual generators and modifiers; and delay units, which interface the modifiers to a large memory bank (up to 64K 20-bit words) for reverberation and table storage. There are 256 generators, 128 modifiers, 256 sum memory locations, and 32 delay units; not all sum memory locations can be written by all processing elements, however. All of these processing elements can run simultaneously. Each generator is divided functionally into an oscillator part and an envelope part. The oscillator part produces normalized square, sawtooth, pulse train, sin(x), sin(x+FM), and sum-of-cosines waveforms. The oscillator parameters that can be controlled include frequency (28 bits), frequency sweep (20), phase angle (20), number of cosines to be summed (if any), and a sum memory address from which frequency modulation (FM) data are taken. The envelope part can produce a constant (12), plus either a linear ramp (24) or a positive or negative exponential function to control the amplitude of the oscillator, with an overall precision of 20 bits. A final 12-by-13-bit two-quadrant multiply scales the oscillator product by the amplitude product, and the result is written to a specified 20-bit-wide sum memory location. In addition, the generators have degenerate modes in which they perform other nec? 1981 by D. Gareth Loy