A Single-Photon Avalanche Diode in CMOS 0.5μm n-well process

A Single-Photon Avalanche Diode (SPAD) design solution that can be implemented in a low cost CMOS process, n-well 0.5μm process, is proposed. This SPAD design used the lateral diffusion of the n-wells to create a low n doping density area as the guard ring to prevent the premature breakdown at the edge of SPAD. Through the TCAD simulation and fabricated design characterization, we found the proper gap length between n-wells to create the guard ring that allows the SPAD to work in the Geiger Mode. The SPAD has dark count rate (DCR) of 750/Hz at 14.85V bias voltage without cooling and 60ns dead time.

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