On-Chip Asymmetric Coaxial Waveguide Structure for Chip Area Reduction

The development of high frequency circuits using CMOS process technology has been progressing rapidly in recent years [1]. With the scaling of CMOS processes to sub-100nm, transistors can perform better with higher cut-off frequency beyond 100-GHz. The performance of the passive devices, however, needs to be improved to exploit the performance of the transistors. In particular, the transmission line should be improved as it is the most basic structure for realizing other devices such as baluns and impedance transformers. It is noted that the area occupied by passive devices should be minimized to save chip area [2]. In addition, advanced CMOS processes require design for manufacturability (DFM) [3] that includes antenna rules which limit the performance of the transmission lines. In this work, a new asymmetric coaxial waveguide (ACW) transmission line structure is designed and fabricated to satisfy the above requirements.