Energy per logic operation in integrated circuits: definition and determination
暂无分享,去创建一个
A figure of merit for the comparison of different types of logic circuits on the basis of inverters is presented. This figure of merit-the minimum energy per logic operation-is equal to the product of the time period necessary for carrying out a logic operation times the power which is fed into the inverter during this time period. Methods for the determination of these terms by ring oscillator measurements and model calculations are considered. In contrast to the so-called `delay-power' product, these newly defined terms are independent of the kind of measurement, as for example the number of stages of the ring oscillator. Thus the minimum energy per logic operation is an intrinsic figure of merit which allows a qualitative comparison of different types of logic circuits on a physical basis.
[1] H. C. Josephs,et al. A figure of merit for digital systems , 1965 .
[2] J. Meindl,et al. VMOS: high speed TTL compatible MOS logic , 1974 .
[3] P. W. Cook,et al. Comparison of MOSFET logic circuits , 1973 .
[4] E.O. Johnson. Power-delay energy comparison of bipolar and IGFET digital devices and circuits , 1975, IEEE Transactions on Electron Devices.
[5] N. C. De Troye. Integrated injection logic-present and future , 1974 .