Drift-Invariant Detection for Multilevel Phase-Change Memory

Next-generation memory (NGM) technologies present a major opportunity but also a significant challenge, due to their intricate reliability issues. In particular, multilevel-cell (MLC) storage is highly desirable for increasing storage capacity and lowering total cost-per-bit. In phase-change memory (PCM), MLC storage is hampered by sensitivity to temperature variations and resistance drift. A novel drift-invariant detection (DID) scheme that estimates variable read thresholds based on ordered statistics and clustering of the soft read-back signals from a small block of 32 cells has been developed and implemented in hardware to improve reliability and prolong data retention. A low-complexity implementation of the DID on a FPGA platform comprises 20'000 LUTs and 6'000 flip-flops and has a latency of 90ns. We present results from an extensive performance verification that ascertains highly reliable data retrieval up to 13 orders of magnitude in time after programming. Such elevated reliability is necessary for the most anticipated application of NGM, namely persistent far-memory, where the NGM is used as a large memory pool, possibly together with DRAM.

[1]  Haralampos Pozidis,et al.  Programming algorithms for multilevel phase-change memory , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

[2]  Haralampos Pozidis,et al.  Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures , 2015, 2015 IEEE International Reliability Physics Symposium.

[3]  Greg Atwood,et al.  A multilevel-cell 32 Mb flash memory , 2000, Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000).

[4]  A. Sebastian,et al.  A Framework for Reliability Assessment in Multilevel Phase-Change Memory , 2012, 2012 4th IEEE International Memory Workshop.

[5]  Matthias Wuttig,et al.  Relation between bandgap and resistance drift in amorphous phase change materials , 2015, Scientific Reports.

[6]  Thomas Parnell,et al.  Phase Change Memory Reliability: A Signal Processing and Coding Perspective , 2015, IEEE Transactions on Magnetics.

[7]  P. M. Grant,et al.  Digital communications. 3rd ed , 2009 .

[8]  Donald Ervin Knuth,et al.  The Art of Computer Programming , 1968 .

[9]  D. Ielmini,et al.  Recovery and Drift Dynamics of Resistance and Threshold Voltages in Phase-Change Memories , 2007, IEEE Transactions on Electron Devices.

[10]  R. Srinivasan.  Importance Sampling: Applications in Communications and Detection , 2010 .

[11]  E. Krause,et al.  Taxicab Geometry: An Adventure in Non-Euclidean Geometry , 1987 .

[12]  Haralampos Pozidis,et al.  Non-resistance-based cell-state metric for phase-change memory , 2011 .

[13]  Schouhamer Immink,et al.  Codes for mass data storage systems , 2004 .

[14]  D. Voorhis.  A generalization of the divide-sort-merge strategy for sorting networks , 1971 .

[15]  C. Hagleitner,et al.  Device, circuit and system-level analysis of noise in multi-bit phase-change memory , 2010, 2010 International Electron Devices Meeting.