A High Performance Interleaved Discontinuous PWM Strategy for Two Paralleled Three-Phase Inverter

This article aims to obtain the optimal combination of the switching loss, maximum zero-sequence circulating current (ZSCC), and line current ripple, which benefits most of the applications. The analysis shows that the interleaved discontinues pulsewidth modulation (IDPWM) maintains the minimum switching loss and line current ripples, but it introduces a larger ZSCC. Therefore, to obtain the optimal combination of the switching loss, maximum ZSCC peak, and line current ripple, it is essential to retain the minimum switching times and the optimal line current ripple of IDPWM but further reducing its overly large ZSCC. Further analysis reveals that IDPWM includes the vector combinations with medium ZSCC change rates, resulting in the larger ZSCC. Given the redundancies of the vector combinations, this article proposes a simple matrix to modify the original modulation signals of IDPWM, eliminating the medium ZSCC change rates. The proposed PWM scheme retains the minimum line current ripple and switching times as those of IDPWM while further reducing its overly large ZSCC, as validated by analytical results as well as experimental results. Since the proposed method obtains the optimal combination among switching loss, line current ripple, and maximum ZSCC peak, we name the proposed PWM scheme a high-performance DPWM.