CMOS data output buffer for integrated memories
暂无分享,去创建一个
[1] C. D. Hartgring,et al. A 40-ns/100-pF low power full-CMOS 256 K (32 K/spl times/8) SRAM , 1987 .
[2] Roelof Herman Willem Salters,et al. A 25-ns low-power full-CMOS 1-Mbit (128 K*8) SRAM , 1988 .
[3] J. L. Prince,et al. Simultaneous switching ground noise calculation for packaged CMOS devices , 1991 .
[4] Guido Torelli,et al. On the design of CMOS digital output drivers with controlled dI/dt , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.
[5] A. J. Rainal. Computing inductive noise of chip packages , 1984, AT&T Bell Laboratories Technical Journal.