ASIC implementation of a hardware-embedded physical unclonable function
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[1] James F. Plusquellic,et al. A non-volatile memory based physically unclonable function without helper data , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[2] Patrick Schaumont,et al. Offline Hardware/Software Authentication for Reconfigurable Platforms , 2006, CHES.
[3] W. R. Daasch,et al. IC identification circuit using device mismatch , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).
[4] Ulrich Rührmair,et al. The Bistable Ring PUF: A new architecture for strong Physical Unclonable Functions , 2011, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust.
[5] Srinivas Devadas,et al. FPGA PUF using programmable delay lines , 2010, 2010 IEEE International Workshop on Information Forensics and Security.
[6] Berk Sunar,et al. Physical unclonable function with tristate buffers , 2008, 2008 IEEE International Symposium on Circuits and Systems.
[7] Leyla Nazhandali,et al. A Highly Stable Leakage-Based Silicon Physical Unclonable Functions , 2011, 2011 24th Internatioal Conference on VLSI Design.
[8] Viktor Fischer,et al. Analysis and Enhancement of Ring Oscillators Based Physical Unclonable Functions in FPGAs , 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.
[9] Gang Qu,et al. Temperature-aware cooperative ring oscillator PUF , 2009, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust.
[10] James F. Plusquellic,et al. Stability analysis of a physical unclonable function based on metal resistance variations , 2013, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).
[11] G.-J. Schrijen,et al. Physical Unclonable Functions and Public-Key Crypto for FPGA IP Protection , 2007, 2007 International Conference on Field Programmable Logic and Applications.
[12] James F. Plusquellic,et al. REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[13] Patrick Schaumont,et al. A large scale characterization of RO-PUF , 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).
[14] Vishwani D. Agrawal,et al. Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits [Book Review] , 2000, IEEE Circuits and Devices Magazine.
[15] N. Draper,et al. Applied Regression Analysis , 1966 .
[16] Dhruva Acharyya,et al. Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF , 2013, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).
[17] Srinivas Devadas,et al. Controlled physical random functions , 2002, 18th Annual Computer Security Applications Conference, 2002. Proceedings..