A 1 V CMOS op amp using bulk-driven MOSFETs
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It is important to develop circuit techniques that permit existing CMOS to implement analog circuits at power supply voltages as low as 1 V. This paper describes some of these techniques and illustrates their application in the design of a CMOS op amp operating from a 1 V power supply. This opamp uses a digital 2-/spl mu/m CMOS having threshold voltages of 0.7 to 0.8 V and demonstrates performance comparable with opamps using higher power supply voltages.
[1] W. Guggenbuhl,et al. A high-swing, high-impedance MOS cascode circuit , 1990 .
[2] Kenneth R. Laker,et al. Design of analog integrated circuits and systems , 1994 .
[3] Chenming Hu,et al. Future CMOS scaling and reliability , 1993, Proc. IEEE.
[4] M. Nagata,et al. Limitations, innovations, and challenges of circuits and devices into a half micrometer and beyond , 1992 .
[5] Anantha P. Chandrakasan,et al. Low-power CMOS digital design , 1992 .