An overview of automated macromodelling techniques for mixed-signal systems

On-chip and on-package integrated systems, such as systems-on-chip (SoCs) and systems-in-packages (SiPs), are composed of a complex mix of digital and mixed-signal circuit blocks. Verifying such systems prior to fabrication is challenging due to their size and complexity. Automated approaches towards extracting system-level macromodels from SPICE-level descriptions of circuit blocks is becoming an increasingly important component of sustainable methodologies for system verification. In this paper, we present an overview of recent algorithmic methods for extracting linear and nonlinear macromodels of mixed-signal circuits, and highlight the potential impact of such techniques.

[1]  H. Alan Mantooth,et al.  Modeling nonlinear dynamics in analog circuits via root localization , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  W. Rugh Linear System Theory , 1992 .

[3]  Jacob K. White,et al.  Generating nearly optimally compact models from Krylov-subspace based reduced-order models , 2000 .

[4]  Zhaojun Bai,et al.  How to make theoretically passive reduced-order models passive in practice , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[5]  Georges G. E. Gielen,et al.  Constructing symbolic models for the input/output behavior of periodically time-varying systems using harmonic transfer matrices , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[6]  P. Dooren,et al.  Asymptotic Waveform Evaluation via a Lanczos Method , 1994 .

[7]  T. Ohtsuki,et al.  Existence Theorems and a Solution Algorithm for Piecewise-Linear Resistor Networks , 1977 .

[8]  Dominique Schreurs,et al.  The construction and evaluation of behavioral models for microwave devices based on time-domain large-signal measurements , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[9]  D.E. Root,et al.  The behavioral modeling of microwave/RF ICs using non-linear time series analysis , 2003, IEEE MTT-S International Microwave Symposium Digest, 2003.

[10]  Jaijeet S. Roychowdhury Reduced-order modelling of time-varying systems , 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

[11]  Sheldon X.-D. Tan,et al.  Efficient DDD-based term generation algorithm for analog circuit behavioral modeling , 2003, ASP-DAC '03.

[12]  Joel R. Phillips,et al.  Projection-based approaches for model reduction of weakly nonlinear, time-varying systems , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  R. D. Figueiredo The Volterra and Wiener theories of nonlinear systems , 1982 .

[14]  Rob A. Rutenbar,et al.  Remembrance of circuits past: macromodeling by data mining in large analog design spaces , 2002, DAC '02.

[15]  J. Roychowdhury,et al.  Reduced-order modelling of linear time-varying systems , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[16]  Luís Miguel Silveira,et al.  Guaranteed passive balancing transformations for model order reduction , 2002, DAC '02.

[17]  Roland W. Freund,et al.  Efficient linear circuit analysis by Pade´ approximation via the Lanczos process , 1994, EURO-DAC '94.

[18]  Roland W. Freund Passive reduced-order models for interconnect simulation and their computation via Krylov-subspace algorithms , 1999, DAC '99.

[19]  Lawrence T. Pileggi,et al.  NORM: compact model order reduction of weakly nonlinear systems , 2003, DAC '03.

[20]  Roland W. Freund,et al.  Reduced-order modeling of large passive linear circuits by means of the SyPVL algorithm , 1996, Proceedings of International Conference on Computer Aided Design.

[21]  J. Roychowdhury Analyzing circuits with widely separated time scales using numerical PDE methods , 2001 .

[22]  W. Rugh Nonlinear System Theory: The Volterra / Wiener Approach , 1981 .

[23]  Jaijeet Roychowdhury MPDE methods for efficient analysis of wireless systems , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[24]  Jacob K. White,et al.  A trajectory piecewise-linear approach to model order reduction and fast simulation of nonlinear circuits and micromachined devices , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[25]  Jacob K. White,et al.  Efficient model reduction of interconnect via approximate system gramians , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[26]  Jacob K. White,et al.  A trajectory piecewise-linear approach to model order reduction and fast simulation of nonlinear circuits and micromachined devices , 2001, ICCAD 2001.

[27]  K. J. Antreich,et al.  Schnelle stationäre simulation nichlinearer Schaltungen im Frequenzbereich , 1992 .

[28]  Sheldon X.-D. Tan,et al.  Efficient very large scale integration power/ground network sizing based on equivalent circuit modeling , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[29]  Yousef Saad,et al.  Iterative methods for sparse linear systems , 2003 .

[30]  Andrew T. Yang,et al.  Stable and efficient reduction of substrate model networks using congruence transforms , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[31]  Lawrence T. Pileggi,et al.  Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[32]  Jacob K. White,et al.  A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits , 1996, ICCAD 1996.

[33]  Georges G. E. Gielen,et al.  A behavioral simulation tool for continuous-time /spl Delta//spl Sigma/ modulators , 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

[34]  Eric James Grimme,et al.  Krylov Projection Methods for Model Reduction , 1997 .

[35]  R.W. Freund,et al.  Efficient Small-signal Circuit Analysis And Sensitivity Computations With The Pvl Algorithm , 1994, IEEE/ACM International Conference on Computer-Aided Design.

[36]  J. Phillips,et al.  Model reduction of time-varying linear systems using approximate multipoint Krylov-subspace projectors , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[37]  Qicheng Yu,et al.  A unified approach to the approximate symbolic analysis of large analog integrated circuits , 1996 .

[38]  Georges G. E. Gielen,et al.  A fitting approach to generate symbolic expressions for linear and nonlinear analog circuit performance characteristics , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[39]  Lawrence T. Pileggi,et al.  PRIMA: passive reduced-order interconnect macromodeling algorithm , 1997, ICCAD 1997.

[40]  Jacob K. White,et al.  Efficient Steady-State Analysis Based on Matrix-Free Krylov-Subspace Methods , 1995, 32nd Design Automation Conference.