The giant k-core of a random graph with a speci ed degree sequence

An error checking circuit for checking periodic pulses for the absence of a pulse or the presence of a spurious pulse. A sequence of periodic pulses is passed through an inverter gate delay line having outputs available from each gate in the delay line. The outputs from even-numbered gates are connected to the inputs of a first gate whose output is a missing pulse error signal when that condition exists. The outputs from odd-numbered gates are connected to the inputs of a second gate whose output is a spurious pulse error signal when such a pulse occurs. Memory means are also provided to store the two output signal conditions.