Design and Implementation of Inter-core Communication Mechanism Based on OMAP Processor

In order to meet the application needs of embedded multi-core, high-speed and high-precision numerical control system, owing to the high latency, low communication capacity of current multi-core communication, this paper studies the design of embedded numerical control system based on ARM and DSP dual-core architecture, designs and implements a multi-core data communication mechanism based on the numerical control system platform. The communication mechanism is based on shared memory, including hardware driver realization, memory division, communication synchronization and the establishment of a shared cache pool and communication protocol. It completes the measurement of dual-core data transmission latency and data transmission capacity, which affects system performance, and carries out the application test. The results prove that this design can meet the performance requirements of 2 MB data communications volume and 20 ms communication delay of the embedded ARM and DSP dual-core architecture numerical control system.