Design and Research of a GaAs/AlAs Superlattice Random Noise Readout Circuit Based on FPGA

In this paper, a random number generator readout circuit with excellent performance is designed and implemented in combination with dual channel ADC acquisition circuit, FPGA, and host computer. The superlattice structure is used as the noise source of the random number generator; the high-speed ADC device is controlled by FPGA to sample and process the noise signal, and the random number is transferred from FIFO to the host computer by USB. The test results show that the system has high speed, good stability, and strong anti-interference ability, which shows that the random number generator can produce good random number.