Model-Based Design of Correct Controllers for Dynamically Reconfigurable Architectures
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[1] Henry Hoffmann,et al. Self-Aware Adaptation in FPGA-based Systems , 2010, 2010 International Conference on Field Programmable Logic and Applications.
[2] Jürgen Becker,et al. Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration , 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).
[3] Jean-Philippe Diguet,et al. Specification and OS-based implementation of self-adaptive, hardware/software embedded systems , 2008, CODES+ISSS '08.
[4] Juanjo Noguera,et al. Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling , 2004, TECS.
[5] Abdoulaye Gamatié,et al. Discrete Control for Reconfigurable FPGA-based Embedded Systems* , 2013 .
[6] Niraj K. Jha,et al. Task graph extraction for embedded system synthesis , 2003, 16th International Conference on VLSI Design, 2003. Proceedings..
[7] Jürgen Becker,et al. Runtime adaptive multi-processor system-on-chip: RAMPSoC , 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.
[8] Éric Rutten,et al. Designing formal reconfiguration control using UML/MARTE , 2012, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).
[9] Brian Bailey,et al. ESL Design and Verification: A Prescription for Electronic System Level Methodology , 2007 .
[10] Sorin A. Huss,et al. Verification of dynamically reconfigurable embedded systems by model transformation rules , 2010, 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[11] Diederik Verkest,et al. Run-Time Management of a MPSoC Containing FPGA Fabric Tiles , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[12] Éric Rutten,et al. A Case Study on Controller Synthesis for Data-Intensive Embedded Systems , 2009, 2009 International Conference on Embedded Software and Systems.
[13] Guy Gogniat,et al. Rapid Application Development on Multi-processor Reconfigurable Systems , 2010, 2010 International Conference on Field Programmable Logic and Applications.
[14] Éric Rutten,et al. Using Controller-Synthesis Techniques to Build Property-Enforcing Layers , 2003, ESOP.
[15] Shoji Ikeda,et al. Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications , 2013, IEICE Electron. Express.
[16] Satnam Singh,et al. Formal verification of reconfigurable cores , 1999, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00375).
[17] Scott Lekuch,et al. Reconfigurable Systems and Flexible Programming for Hardware Design, Verification and Software Enablement for System-on-a-Chip Architectures , 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.
[18] Camel Tanougast,et al. A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems , 2008, ARC.
[19] Éric Rutten,et al. Autonomic Management of Dynamically Partially Reconfigurable FPGA Architectures Using Discrete Control , 2013, ICAC.
[20] Guy Gogniat,et al. A co-design approach for embedded system modeling and code generation with UML and MARTE , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.
[21] Jean-Luc Dekeyser,et al. Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation , 2010, Int. J. Embed. Syst..
[22] Henry Hoffmann,et al. Comparison of Decision-Making Strategies for Self-Optimization in Autonomic Computing Systems , 2012, TAAS.
[23] Ouiza Dahmoune,et al. Applying Model-Checking to Post-Silicon-Verification: Bridging the Specification-Realisation Gap , 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.
[24] Manfred Glesner,et al. Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes , 2009, 2009 International Conference on Field Programmable Logic and Applications.
[25] Jürgen Teich,et al. The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer , 2007, J. VLSI Signal Process..
[26] Maher Ben Jemaa,et al. Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures , 2007, Trans. High Perform. Embed. Archit. Compil..
[27] Oliver Diessel,et al. Modeling Dynamically Reconfigurable Systems for Simulation-Based Functional Verification , 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.
[28] O. Khan,et al. ACM Transactions on Embedded Computing Systems continued on back cover , 2018 .
[29] Éric Rutten,et al. Extending UML/MARTE to Support Discrete Controller Synthesis, Application to Reconfigurable Systems-on-Chip Modeling , 2014, TRETS.
[30] Clive Maxfield,et al. The Design Warrior's Guide to FPGAs: Devices, Tools and Flows , 2004 .
[31] H. Marchand,et al. Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology , 2000, IEEE Trans. Software Eng..
[32] Sang Hyuk Son,et al. Feedback Control Real-Time Scheduling: Framework, Modeling, and Algorithms* , 2001, Real-Time Systems.
[33] W. M. Wonham,et al. The control of discrete event systems , 1989 .
[34] Éric Rutten,et al. Contracts for modular discrete controller synthesis , 2010, LCTES '10.