Data input circuit and data input method for synchronous semiconductor memory device

PURPOSE: A data input circuit and a data input method of a synchronous semiconductor memory device are provided, which can patch data of N bit stably by increasing a timing margin between a data strobe signal and an external clock signal. CONSTITUTION: A semiconductor memory device comprises a clock buffer(110), a data strobe buffer(130), a data input buffer(150), a data input circuit(170) and a data input driver(190). The clock buffer generates an internal clock signal(PCLK) in response to the first edge of an external clock signal(CLK), and the data strobe buffer generates the first internal data strobe signal(PDSb0) by buffering a data strobe signal(DQS). The data input buffer generates internal data(PDIN) having N bit data string by buffering external data(DIN) having N bit data string. The data input circuit converts N bit serial data(PDIN) into N bit parallel data in response to the internal clock signal and the first internal data strobe signal, and then outputs it to the data input driver. The data input driver drives an output signal of the data input circuit to a memory cell array.