An FPGA-based accelerator for Fourier Descriptors computing for color object recognition using SVM

Fourier Descriptors (FD) can be used as feature vector components in various applications, such as real-time color object recognition or image retrieval. The full process is composed of the feature extraction followed by a classification step performed using support vector machine (SVM). In order to accelerate the computation of FD, a hardware implementation using FPGA technology is presented in this paper. We evaluated classification performance with respect to lighting variations and noise sensibility. Several experiments were carried out on three databases. Then an efficient architecture for FD computation on FPGAs is proposed and designed as accelerator. The WildCard is used to prototype this implementation. This design can have an operation speed up of approximately 10 compared to the standard software PC implementation.

[1]  Bernhard Schölkopf,et al.  Support Vector methods in learning and feature extraction , 1998 .

[2]  Hubert Fonga Tchinkante Analyse harmonique sur les groupes et reconnaissance des formes , 1992 .

[3]  Jihan Zhu,et al.  FPGA Implementations of Neural Networks - A Survey of a Decade of Progress , 2003, FPL.

[4]  A. Sheikholeslami,et al.  Real-time face detection and lip feature extraction using field-programmable gate arrays , 2006, IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics).

[5]  Alireza Khotanzad,et al.  Invariant Image Recognition by Zernike Moments , 1990, IEEE Trans. Pattern Anal. Mach. Intell..

[6]  Erik Hjelmås,et al.  Face Detection: A Survey , 2001, Comput. Vis. Image Underst..

[7]  Partha Niyogi,et al.  Distinctive feature detection using support vector machines , 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).

[8]  Jean-Paul Gauthier,et al.  Harmonic Analysis : Motions and Pattern Analysis on Motion Groups and Their Homogeneous Spaces , 2004 .

[9]  J. Miteran,et al.  Colour Object recognition combining Motion Descriptors, Zernike Moments and Support Vector Machine , 2006, IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics.

[10]  Noel E. O'Connor,et al.  Energy-Efficient Hardware Architecture for Variable N-point 1D DCT , 2004, PATMOS.

[11]  Walid A. Najjar,et al.  Automation of IP Core Interface Generation for Reconfigurable Computing , 2006, 2006 International Conference on Field Programmable Logic and Applications.

[12]  Hua Hu,et al.  Key Issues of FPGA Implementation of Neural Networks , 2008, 2008 Second International Symposium on Intelligent Information Technology Application.

[13]  José M. Solana,et al.  Haar wavelet based processor scheme for image coding with low circuit complexity , 2007, Comput. Electr. Eng..

[14]  Ahmed Bouridane,et al.  Design and implementation of a high level programming environment for FPGA-based image processing , 2000 .

[15]  Fan Yang,et al.  Implementation of an RBF neural network on embedded systems: real-time face tracking and identity verification , 2003, IEEE Trans. Neural Networks.

[16]  Vladimir Vapnik,et al.  The Nature of Statistical Learning , 1995 .

[17]  Vladimir Pavlovic,et al.  A hybrid face recognition method using Markov random fields , 2004, ICPR 2004.

[18]  Ahmed Bouridane,et al.  An FPGA Based Coprocessor for GLCM and Haralick Texture Features and their Application in Prostate Cancer Classification , 2005 .

[19]  Guodong Guo,et al.  Face recognition by support vector machines , 2000, Proceedings Fourth IEEE International Conference on Automatic Face and Gesture Recognition (Cat. No. PR00580).

[20]  Vladimir N. Vapnik,et al.  The Nature of Statistical Learning Theory , 2000, Statistics for Engineering and Information Science.

[21]  Marco Mattavelli,et al.  Configurable motion-estimation hardware accelerator module for the MPEG-4 reference hardware description platform , 2005, IEEE International Conference on Image Processing 2005.

[22]  Marco Mattavelli,et al.  A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs , 2005, 2005 IEEE International Conference on Multimedia and Expo.

[23]  Stepán Obdrzálek,et al.  Object Recognition using Local Affine Frames on Distinguished Regions , 2002, BMVC.

[24]  Johel Mitéran,et al.  SVM approximation for real-time image segmentation by using an improved hyperrectangles-based method , 2003, Real Time Imaging.

[25]  Vladimir Pavlovic,et al.  A hybrid face recognition method using Markov random fields , 2004, Proceedings of the 17th International Conference on Pattern Recognition, 2004. ICPR 2004..

[26]  Aleix M. Martínez,et al.  Recognition of partially occluded and/or imprecisely localized faces using a probabilistic approach , 2000, Proceedings IEEE Conference on Computer Vision and Pattern Recognition. CVPR 2000 (Cat. No.PR00662).

[27]  D. Houzet,et al.  Implementation of the SVM neural network generalization function for image processing , 2000, Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception.

[28]  Naveen K. Nishchal,et al.  Retrieval and classification of shape-based objects using Fourier, generic Fourier, and wavelet-Fourier descriptors technique: A comparative study , 2007 .