A single-charge-based random fluctuation model suited for analyzing both random telegraph noise (RTN) and intrinsic channel transistors (UTB-SOI, FinFET etc) is proposed. Combining a quantitative formula for the worst case VTH shift (DeltaVTH) with measured data of RTN amplitude distributions, it is shown that RTN should not be ignored for scaled SRAM design. The model also shows that scaling of intrinsic channel FETs will be limited by the fluctuations caused by residual random charge, which rapidly increase in proportion to 1/LW.