Linear Assembly 에 기반한 MPEG-I Layer II 의 성능 개선
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In this paper, we address the complexity reduction of a real-time DSP implementation of the MPEG-Ⅰ Layer Ⅱ decoder by using the linear assembly. The DSP processor used in this work is a fixed-point digital signal processor, TMS320C6416, and the linear assembly is supported by Texas Instruments in order to improve the performance of DSP programming using the C language and a cross compiler. Especially, we apply the linear assembly programming in the synthesis filtering of the MPEG-Ⅰ Layer Ⅱ decoder since the synthesis filtering module requires the most processing time among all the processing modules of the decoder. As a result, we achieve processing time reduction of 24% by applying the linear assembly programming compared with the C programming when stereo audio signals are sampled at a rate of 48 ㎑ and compressed with a bit rate of 384 bit/s.