Design and stability analysis of CNTFET based SRAM Cell
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Mohita | J. K. Das | Joy Chowdhury | Tannu Newar | Tista Roy | Joy Chowdhury | J. Das | Tannu Newar | Tista Roy
[1] K Dhanumjaya,et al. Cell Stability Analysis of Conventional 6T Dynamic 8T SRAM Cell in 45NM Technology , 2012, VLSIC 2012.
[2] Kaushik Roy,et al. Reducing leakage in a high-performance deep-submicron instruction cache , 2001, IEEE Trans. Very Large Scale Integr. Syst..
[3] Pankaj Agarwal,et al. A low leakage and SNM free SRAM cell design in deep sub micron CMOS technology , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).
[5] Vishwani D. Agrawal. A Review of Carbon Nanotube Field Effect Transistors , 2003 .