论文信息 - Design Optimization and Modeling of Charge Trap Transistors (CTTs) in 14 nm FinFET Technologies - 字舞流文

Design Optimization and Modeling of Charge Trap Transistors (CTTs) in 14 nm FinFET Technologies

J. Woo | T. Kirihata | D. Moy | N. Robson | F. Khan | S. Iyer | E. Banghart | R. Katz | M. Han | Liu Jiang