Employment of Reduced Precision Redundancy for Fault Tolerant FPGA Applications

This research explores the employment ofReduced Precision Redundancy (RPR) as a powersavingalternative to traditional Triple ModularRedundancy (TMR). This paper focuses on the detailsof RPR implementation and the effect of RPR faulttolerance on the performance of spacecraft systems.RPR-protected system performance is evaluated usinga signal-to-noise ratio analogy developed withMATLAB and Simulink computational tools. Thisresearch demonstrates that RPR is an effective faulttolerance approach for arithmetic operationsExperimental results show that the benefit of RPRincreases with the complexity of the operation to whichit is applied. System performance simulationsdemonstrate that RPR provides very good recoveryfrom errors caused by SEE in spacecraft systems.