A 2.5-V, 14-bit MASH sigma-delta modulator for ADSL

This work presents a fourth order, multi-stage noise shaped (MASH) sigma-delta modulator (SDM) for wide bandwidth applications. Each stage of the SDM consists of a second order SDM with multi-level quantizer. The first stage is a low distortion second order single loop SDM, while the second stage of the SDM is a low distortion SDM with Chebyshev type II filter technique. The proposed architecture can reduce the signal distortion of circuits to improve the performance. A test SDM chip for ADSL application is designed and implemented by TSMC 0.25/spl mu/m process. The simulation results indicate that the dynamic range (DR) could reach 87dB with power dissipation of 65mW.

[1]  Tai-Haur Kuo,et al.  A wideband CMOS sigma-delta modulator with incremental data weighted averaging , 2002 .

[2]  R. Schreier,et al.  Delta-sigma data converters : theory, design, and simulation , 1997 .

[3]  José Luis Huertas,et al.  Modeling opamp-induced harmonic distortion for switched-capacitor /spl Sigma//spl Delta/ modulator design , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[4]  Jan Sevenhans,et al.  A/D and D/A conversion for telecommunication , 1999 .

[5]  Terri S. Fiez,et al.  Improved /spl Delta//spl Sigma/ DAC linearity using data weighted averaging , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[6]  O. Oliaei,et al.  A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE , 2002 .

[7]  Jen-Shiun Chiang,et al.  Novel noise shaping of cascaded sigma-delta modulator for wide bandwidth applications , 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

[8]  Gabor C. Temes,et al.  A Higher Order Topology for Interpolative Modulators for Oversampling A/D Converters , 1992 .

[9]  Terri S. Fiez,et al.  Improved Delta-Sigma DAC Linearity Using Data Weighted Averaging. , 1995 .

[10]  Fernando Medeiro,et al.  Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design. , 1994 .

[11]  K.C.-H. Chao,et al.  A higher order topology for interpolative modulators for oversampling A/D converters , 1990 .

[12]  G. Temes,et al.  Wideband low-distortion delta-sigma ADC topology , 2001 .

[13]  W. Sansen,et al.  A 3.3 V 15-bit delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL-applications , 1999, Proceedings of the 24th European Solid-State Circuits Conference.