Improving the Digital Design with Semi-formal Specification

In this work, an improvement of the traditional design methodology is proposed. The major change is the use of semi-formal specification for the implementation and the establishment of properties for the formal verification. From semi-formal specification, assertions were written using Property Specification Language (PSL) for an alignment circuit. Finally, a set of properties for the verification of this module were established and proved using two verification tools. Our statistics proved that, considerable design time was saved, and the number of versions was low.

[1]  David Lee,et al.  Principles and methods of testing finite state machines-a survey , 1996, Proc. IEEE.

[2]  M. H. Rashid.  Proceedings of the IASTED International Conference on Circuits, Signals, and Systems, May 19-21, 2003, Cancun, Mexico , 2003 .

[3]  Thomas Kropf,et al.  Introduction to Formal Hardware Verification , 1999, Springer Berlin Heidelberg.

[4]  F. Torres,et al.  Design and verification driven by assertions , 2004, (ICEEE). 1st International Conference on Electrical and Electronics Engineering, 2004..