A Flexible and Compact Hardware Architecture for the SIMON Block Cipher

SIMON is a recent, light-weight block cipher developed by NSA. Previous work on SIMON shows that it is a very promising alternative of AES for resource-constrained platforms. While SIMON offers a range of block sizes and key lengths, a straightforward implementation would select fixed values in order to achieve a compact design. In contrast, we propose a flexible hardware architecture on FPGAs that still preserves the compactness of SIMON. The proposed implementation can execute all configurations of SIMON, and thus provides a versatile architecture that enables adaptive security using a variable key-size. Moreover, it also reduces the inefficiency of encrypting slightly longer messages by supporting a variable block-size. The implementation results show that the proposed architecture occupies 90 and 32 slices on Spartan-3 and Spartan-6 FPGAs, respectively. To our best knowledge, these area results are smaller than other block ciphers of similar security level. Furthermore, we also quantify the cost of flexibility and show the trade-off between the security level, throughput and area.

[1]  Mohamed F. Younis,et al.  Adaptive security provision for increased energy efficiency in Wireless Sensor Networks , 2009, 2009 IEEE 34th Conference on Local Computer Networks.

[2]  Jean-Jacques Quisquater,et al.  FPGA implementations of the ICEBERG block cipher , 2005, International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II.

[3]  H. Li.  Efficient and flexible architecture for AES , 2006 .

[4]  Kalpana Sharma,et al.  Cross Layer Security Framework for Wireless Sensor Networks , 2011 .

[5]  F.-X. Standaert,et al.  FPGA Implementation(s) of a Scalable Encryption Algorithm , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[6]  Peter Langendörfer,et al.  Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors , 2010, Int. J. Distributed Sens. Networks.

[7]  Jens-Peter Kaps,et al.  Lightweight Cryptography for FPGAs , 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

[8]  Jens-Peter Kaps,et al.  Chai-Tea, Cryptographic Hardware Implementations of xTEA , 2008, INDOCRYPT.

[9]  Angelos D. Keromytis,et al.  Elastic block ciphers: the basic design , 2007, ASIACCS '07.

[10]  Ben Rothke.  AES: Advanced Encryption Standard , 2015 .

[11]  Yong Wang,et al.  A survey of security issues in wireless sensor networks , 2006, IEEE Communications Surveys & Tutorials.

[12]  Jason Smith,et al.  The SIMON and SPECK Families of Lightweight Block Ciphers , 2013, IACR Cryptol. ePrint Arch..

[13]  Angelos D. Keromytis,et al.  Elastic Block Ciphers , 2004, IACR Cryptol. ePrint Arch..

[14]  Tim Güneysu,et al.  Cryptanalysis with COPACOBANA , 2008, IEEE Transactions on Computers.

[15]  Mohammed Benaissa,et al.  Low area memory-free FPGA implementation of the AES algorithm , 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

[16]  Ricardo Chaves,et al.  Compact CLEFIA Implementation on FPGAS , 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

[17]  Patrick Schaumont,et al.  SIMON Says: Break Area Records of Block Ciphers on FPGAs , 2014, IEEE Embedded Systems Letters.

[18]  Patrick Schaumont,et al.  Three Design Dimensions of Secure Embedded Systems , 2013, SPACE.

[19]  Joan Daemen,et al.  AES - The Advanced Encryption Standard , 2002 .

[20]  Srivaths Ravi,et al.  Security as a new dimension in embedded system design , 2004, Proceedings. 41st Design Automation Conference, 2004..

[21]  M. McLoone,et al.  Generic architecture and semiconductor intellectual property cores for advanced encryption standard cryptography , 2003 .