论文信息 - A Novel PSR Enhancement Technique for Full on-Chip Low-Dropout Regulator

A Novel PSR Enhancement Technique for Full on-Chip Low-Dropout Regulator

A novel feedback-factor-control (FFC) technique is presented to improve mid-frequency power supply rejection (PSR) of full on-chip low dropout regulator (LDO). With this method, the zeros of PSR are rearranged in a nested Miller compensation (NMC) based full on-chip LDO. The mid-frequency PSR is enhanced when the dominant zero of PSR is moved to higher frequency by FFC circuit. The full on-chip LDO implemented with Chartered 0.35μm CMOS process, features almost -90dB PSR at 10 kHz and about - 45dB at 1MHz. When the load current changed from 0.5mA to 50mA, the maximum output-voltage variation is less than 70mV.

Yang Liu | Yuchun Chang | Shuying Zhang | Ling Ding | Yingying Yuan

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