A GSM receiver base band in 0.25µ, 1.8V fully depleted SOI including a 4 th order serial ΣΔ A/D converter

SOI technology is very promising for digital low voltage low power devices, but radio integration requires also the base band analog and the RF circuits to be realised in the same technology for a single chip radio. In the analog circuits we learn to live with the kink effect and in the RF we benefit from the low drain&source to bulk capacitance. In this paper we report the obstacles encountered in the base band analog design for a GSM receiver and the 4thorder serial sigma delta architecture.