Multiple input bridging fault detection in CMOS sequential circuits

Bridging fault testing algorithms for CMOS sequential circuits, assuming current supply monitoring, are discussed. Sequential circuits implemented both with and without scan design are considered. Experimental results are given to show the efficacy of the methods.<<ETX>>

[1]  David Bryan,et al.  Combinational profiles of sequential benchmark circuits , 1989, IEEE International Symposium on Circuits and Systems,.

[2]  John Paul Shen,et al.  Inductive Fault Analysis of MOS Integrated Circuits , 1985, IEEE Design & Test of Computers.

[3]  Mark W. Levi,et al.  CMOS Is Most Testable , 1981, International Test Conference.

[4]  Niraj K. Jha,et al.  Detection of multiple input bridging and stuck-on faults in CMOS logic circuits using current monitoring , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..

[5]  Melvin A. Breuer,et al.  On detecting single and multiple bridging faults in CMOS circuits using the current supply monitoring method , 1990, IEEE International Symposium on Circuits and Systems.

[6]  J. M. Soden,et al.  Electrical properties and detection methods for CMOS IC defects , 1989, [1989] Proceedings of the 1st European Test Conference.

[7]  Wojciech Maly,et al.  Test generation for current testing , 1989, [1989] Proceedings of the 1st European Test Conference.

[8]  Srinivas Devadas,et al.  Test generation and verification for highly sequential circuits , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Alberto L. Sangiovanni-Vincentelli,et al.  Irredundant sequential machines via optimal logic synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  J. Paul Roth,et al.  Diagnosis of automata failures: a calculus and a method , 1966 .

[11]  James B. Angell,et al.  Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic , 1973, IEEE Transactions on Computers.