Strained N-Channel FinFETs with 25 nm Gate Length and Silicon-Carbon Source/Drain Regions for Performance Enhancement

We report the demonstration of 25 nm gate length L<sub>G</sub> tri-gate FinFETs with Si<sub>0.99</sub>C<sub>0.01</sub> source and drain (S/D) regions. The strain-induced mobility enhancement due to the Si<sub>0.99</sub>C<sub>0.01</sub> S/D leads to a drive current I<sub>Dsat</sub> improvement of 20% at a fixed off-state current I<sub>off</sub> of 1times10<sup>-7</sup> A/mum. With additional channel strain engineering, FinFETs incorporating Si<sub>0.99</sub>C<sub>0.01</sub> S/D and a tensile-stress silicon nitride (SiN) capping etch-stop layer (ESL) achieve an I<sub>Dsat</sub> enhancement of 56%