Inspection sensitivity improvement by wafer sort failure sites matching algorithm — Chimin Chen

Micro-crack of ILD oxide in peripheral area leads to wafer sort leakage failure issue. However, high nuisance rate in peripheral area inspection cannot monitor it effectively. This paper addresses a new methodology to improve the inspection sensitivity by transferring the wafer sort specific failure sites into GDS coordinates on design layout. These failure sites are the patterns of interest (POIs) which induced micro-crack easily. Further patterns grouping and searching will find out the similar patterns in whole chip, therefore, we can transfer these POIs into thousands to millions of care areas to do the extreme high sensitivity inspection. As compared to previous full scan area, the care area reduction with small POIs clips is 1/10 of original full scan area. High sensitivity inspection can monitor critical processes effectively, and improve the turnaround time (TAT) of product development efficiently.