论文信息 - Design challenges for 22nm CMOS and beyond

Design challenges for 22nm CMOS and beyond

This paper presents technology and economic challenges posed by 22nm CMOS and beyond. They can be addressed by advances in design technology, methodology, validation, and testing, to continue to enjoy the benefits of CMOS scaling in the future, as we have over the past decades.

Shekhar Borkar

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[2] Shekhar Y. Borkar,et al. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation , 2005, IEEE Micro.